Synopsys launches first 1.6T Ethernet IP solution for AI and hyperscale chips
Synopsys has delivered a dramatic increase in bandwidth and throughput for data-intensive AI workloads with the industry ' s first complete 1.6T Ethernet IP solution . Hyperscale data centres – a backbone in the era of pervasive intelligence – require high-bandwidth , low-latency chips and interfaces to process petabytes of data quickly . Synopsys ' new 1.6T Ethernet IP solution enables design teams to create the industry ' s fastest chips for AI and data centre networking applications . to enable emerging AI workloads , according to John Koeter , Senior Vice President of Marketing and Strategy for IP , Synopsys . He adds : “ Our complete IP solution for 1.6T Ethernet , pre-verified subsystems , successful ecosystem interoperability and decades of expertise in developing and delivering the industry ' s broadest interface IP portfolio allow designers to confidently integrate the necessary functionality into their SoCs with less risk .”
Synopsys is enabling hyperscale data centre providers , and the ecosystem that serves them , to future-proof their infrastructure via their silicon roadmap , using the industry ' s most extensive , interoperable and proven IP portfolio .
“ Massive Artificial Intelligence and Machine Learning workloads are accelerating the need for 1.6T Ethernet in data centres ,” said Ram Periakaruppan , Vice President and General Manager , Network Test & Security Solutions , Keysight Technologies . “ The combination of Synopsys ' new 1.6T Ethernet controllers and robust 224G Ethernet PHY IP and Keysight ' s IxVerify pre-silicon test solution are essential to helping customers design the world ' s fastest , most reliable system on a chip devices .”
Keith Guetig , Vice President of Product Management , Samtec , added : “ Insatiable demand for high-speed data access is pushing hyperscale cloud providers to upgrade their networking infrastructure to maintain their competitive edge . With successful interoperability between this and many prior generations of Synopsys ' high-quality Ethernet solutions and Samtec ' s high-speed FlyOver cable assemblies , chip designers and system architects can reduce their design risk when developing the next generation of SoCs for cloud , AI and 5G applications .”
Peter Jones , Chairman , Ethernet Alliance , said : “ With growing demands from Large Language Modelling ( LLM ), HPC simulation and AI training in hyperscale data centres , network boundaries are crossing over the Terabits per second threshold . The availability of development tools capable of meeting these needs is critical to the success of next-generation Ethernet standards addressing this market .”
The massive compute demands of hyperscale data centres require significantly faster Ethernet speeds
Synopsys ' comprehensive IP solution , including new 1.6T MAC and PCS Ethernet controllers , 224G Ethernet PHY IP and verification IP , accelerates time to market for AI and HPC networking chips . The complete 1.6T Ethernet IP solution optimises hyperscale data centre energy efficiency by reducing interconnect power consumption by up to 50 % compared to existing SoC implementations .
The new multi-channel , multi-rate Synopsys 1.6T Ethernet MAC and PCS Controllers decrease area by 50 % and reduce latency by 40 % by implementing a patented Reed-Solomon Forward Error Correction architecture , while helping ensure reliable data for Ethernet rates from 10G to 1.6T . The siliconproven 224G Ethernet PHY IP delivers robust link performance with exceptional signal integrity and seamless ecosystem interoperability for multiple channel lengths . �
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