To address memory-intensive applications , data centre operators add extra servers to get higher memory bandwidth and higher memory capacity .

The compute capabilities from the added processors are typically not utilised for these applications , making the servers inefficient from cost and power perspectives . The CXL industry-standard addresses this challenge by enabling new architectures that can efficiently add memory to generalpurpose servers .

For a DLRM server using a single 64-core processor , adding a single Structera A device would increase the number of compute cores by 25 % ( 64 vs 80 ), aggregate memory bandwidth by 50 % ( 400 GB / sec vs 600 GB / sec ), total memory by up to 4TB and memory bandwidth per core by 25 % ( 6.25 GB / sec vs . 7.5 GB / sec ).

The Structera product line comprises two CXL device families that are optimised for different use cases . The Structera A CXL near-memory accelerators are a new category of devices that integrate server-class processor cores and multiple memory channels with CXL to address high-bandwidth memory applications such as Deep Learning recommendation models ( DLRM ) and Machine Learning .

The Structera X CXL memory-expansion controllers enable terabytes of memory to be added to general-purpose servers and address high-capacity memory applications such as inmemory databases . The Structera CXL device families are the industry ’ s first to support four memory channels , integrate inline compression and use 5nm manufacturing processes .

In addition to the Structera A and X standard products , Marvell develops custom CXL silicon for cloud operators that are optimised for their unique architectures and workloads .

A new CXL use case : ML / AI acceleration

The Structera A accelerators integrate 16 Arm Neoverse V2 cores and are optimised to improve the performance of high memory-bandwidth applications such as DLRM . DLRM is characterised by both sparse and dense memory operations . Sparse operations may hit a memory wall , in which memory bandwidth is insufficient for the available compute . The Structera A 2504 accelerator , the first product in the family , supports up to 200 GB / sec memory bandwidth and 4TB of memory capacity .

It would also improve memory bandwidth power efficiency from 1W to 0.83W per GB / sec .

Adding two Structera A devices would increase compute cores by 50 %, double aggregate memory bandwidth , increase memory capacity by up to 8TB , increase memory bandwidth per core by 50 % and improve memory bandwidth power efficiency to 0.75W per GB / sec .

The Structera X product family , by contrast , is designed to expand memory capacity per server to address high-capacity memory applications . The Structera X devices are the industry ’ s first to support four channels of DDR4 and DDR5 memory and support up to three DDR4 dual in-line memory modules ( DIMMs ) per channel ( 3DPC ) for maximising memory capacity per controller and server node .

The devices are also the first CXL memory-expansion products that can simultaneously support two server CPUs to optimise power , space and memory utilisation .

The Structera X 2404 enables operators to recycle their DDR4 DIMMs from decommissioned general-purpose servers . Millions of functional DDR4 DIMMs are expected to become e-waste over the next few years as operators replace existing generalpurpose servers with new ones utilising DDR5 . Using ‘ free ’ DDR4 DIMMs to expand the capacity in these servers reduces CAPEX by thousands of dollars per general-purpose server . Repurposing decommissioned DDR4 DIMMs also addresses data centre sustainability goals . �

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